Adlink ACL-8112 Series Manual do Utilizador descarregar pdf (Página 57)

Operation Theory

•

16-BITS BINARY COUNTER

BINARY CODED DECIMAL (BCD) COUNTER (4

DIGITAL)

Note

The count of the binary counter is from 0 up to

65,535 and the count of the BCD counter is from 0

up to 9,999

Mode Definitions

With the 8254, six operating modes can be selected. they are:

•

Mode 0

: Interrupt on Terminal Count

•

Mode 1

: Programmable One-Shot.

•

Mode 2

: Rate Generator

•

Mode 3

: Square Wave Rate Generator

•

Mode 4

: Software Triggered Strobe

•

Mode 5

: Hardware Triggered Strobe

Detail description of these six modes is written in Intel Microsystems

Components Handbook Volume II Peripherals.

1 2 ... 52 53 54 55 56 57 58 59 60 61 62 ... 93 94

User’s Guide 1
Getting Service from ADLINK 4
Table of Contents 5
How to Use This Guide 8
Introduction 9
Introduction 10
1.1 Features 11
1.2 Applications 12
1.3 Specifications 12
1.4 Software Support 16
Installation 17
2.2 Unpacking 18
2.3 ACL-8112's Layout 19
Installation 20
2.5 Base Address Setting 21
2.7 DMA Channel Setting 24
2.9 Clock Source Setting 26
2.10 IRQ Level Setting 26
Signal Connections 29
3.4 Digital I/O Connection 36
3.6.1 Connect with ACLD-8125 38
3.6.2 Connect with ACLD-9137 38
3.6.3 Connect with ACLD-9182 38
3.6.4 Connect with ACLD-9185 38
3.6.5 Connect with ACLD-9188 38
Registers 39
4.1 I/O Port Address 40
4.2 A/D Data Registers 41
4.8 Digital I/O register 47
4.9 D/A Output Register 48
Operation Theory 51
5.1.2 A/D Trigger Modes 52
Vout Vref 54
5.4 Timer/Counter Operation 55
Calibration & Utilities 59
6.2 VR Assignment 60
6.3 D/A Adjustment 60
6.5 A/D Adjustment 61
C Language Library 63
7.1 _8112_Initial 64
Example: 65
7.2 _8112_Switch_Card_No 66
7.3 _8112_DI 67
7.4 _8112_DI _Channel 68
7.5 _8112_DO 69
7.6 _8112_DA 70
7.7 _8112_AD_Input_Mode 71
7.8 _8112_AD_Set_Channel 73
7.9 _8112_AD_Set_Range 74
Argument: 76
Return Code: 76
7.10 _8112_AD_Set_Mode 77
7.11 _8112_AD_Soft_Trig 79
7.12 _8112_AD_Aquire 80
7.13 _8112_CLR_IRQ 81
7.14 _8112_AD_DMA_Start 82
7.15 _8112_AD_DMA_Status 84
7.16 _8112_AD_DMA_Stop 85
7.17 _8112_AD_INT_Start 86
7.18 _8112_AD_INT_Status 87
7.19 _8112_AD_INT_Stop 88
7.20 _8112_AD_Timer 89
7.21 _8112_TIMER_Start 90
7.22 _8112_TIMER_Read 91
7.23 _8112_TIMER_Stop 91
Appendix A. Demo Programs 93
Warranty Policy 94

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