Adlink ACL-8216 Manual do Utilizador descarregar pdf (Página 40)

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Registers Format

3.10 Internal Timer/Counter Register

Two counter of 8254 are used for periodically triggering the A/D conversion,

the left one is left free for user applications. The 8254 occupies 4 I/O address

locations in the ACL-8216 as shown blow. Users can refer to NEC's or Intel's

data sheet for a full description of the 8254 features, condensed information

is specified in Appendix B.

Address : BASE + 0 ~ BASE + 3

Attribute: read / write

Data Format:

Base + 0 Counter 0 Register ( R/W)

Base + 1 Counter 1 Register ( R/W)

Base + 2 Counter 2 Register ( R/W)

Base + 3 8254 CONTROL BYTE

1 2 ... 35 36 37 38 39 40 41 42 43 44 45 ... 74 75

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Adlink ACL-8216 Manual do Utilizador Página 40