Adlink cPCI-9116 Manual do Utilizador descarregar pdf (Página 33)

Registers • 23

Counter en (bit7): GPTC0 count enable

1: enable GPTC0

0: disable GPTC0

UpDown (bit6): GPTC0’s up/down pin software control

1: Up counter

0: Down counter

UpDown src(bit5): GPTC0’s up/down pin selection bit

1: External input (Pin 98)

0: Software Control

Gate_src (bit4): GPTC0’s gate source

1: External Input (Pin 97)

0: gate controlled by setting the enable (bit7)

Clk_src (bit3): GPTC0’s clock source

1: External Input (Pin 96)

0: Internal Timebase

MODE1~MODE0 (bit1 ~ bit0): GPTC0’s Mode selection

MODE1 MODE0 Description

0 0 General Counter

0 1 Pulse Generation

1 0 X

1 1 X

Table 6. GPTC0’s Mode selection

1 2 ... 28 29 30 31 32 33 34 35 36 37 38 ... 97 98

User’s Guide 1
Getting service from ADLINK 4
Table of Contents 5
Figures 9
Outline of Chapters 10
Introduction 11
1.1 Features 12
1.2 Applications 12
1.3 Specifications 13
1.4 Software Support 16
1.4.3 DAQBench 17
: ActiveX Controls 17
Installation 18
2.2 Unpacking 19
10 • Installation 20
Installation • 11 21
2.4 PCI Configuration 22
Signal Connections 23
14 • Signal Connections 24
3.1.2 Legend of J1 25
3.2.2 Input Configurations 26
3.3 Digital I/O Connection 28
Registers 29
4.5 A/D Data Registers 34
4.9 Digital I/O register 39
Operation Theory 44
Sampling Interval t= 47
SI2_COUNTER/TimeBase 47
Scan Interval T= 47
SI_COUNTER/TimeBase 47
• Operation Theory 56
Retrig_no 56
Data FIFO 57
EOC Interrupt Transfer 57
DMA Transfer 58
Operation Theory • 49 59
50 • Operation Theory 60
C/C++ Library 61
6.2 Programming Guide 62
6.3 Initial functions 64
6.3.2 _9116_AD_Clr_DFIFO 65
6.4 DIO functions 66
6.5.1 _9116_AD_Clr_CFIFO 67
6.5.2 _9116_AD_Set_CFIFO 68
6.5.3 _9116_AD_CFIFO_SetDone 70
6.6.1 _9116_AD_Acquire 71
6.8.1 _9116_AD_Set_SC 74
6.8.2 _9116_AD_Set_SI 75
6.8.3 _9116_AD_Set_SI2 75
6.8.4 _9116_AD_Set_DIV 76
6.8.5 _9116_AD_Set_DLY1 76
6.8.6 _9116_AD_Set_M 77
6.8.7 _9116_AD_Set_Retrig 78
6.9.1 _9116_AD_DMA_Start 79
6.9.2 _9116_AD_DMA_Status 80
6.9.3 _9116_AD_DMA_Stop 81
6.10.1 _9116_AD_INT_Start 82
6.10.2 _9116_AD_INT_Status 83
6.10.3 _9116_AD_INT_Stop 84
6.11.1 _9116_DblBufferMode 85
6.12.1 _9116_GP0_Set_Mode 87
6.12.2 _9116_GP0_Set_Count 88
6.12.3 _9116_GP0_Set_CLK 88
6.12.6 _9116_GP0_Set_UPDOWN 90
6.12.7 _9116_GP0_EN 90
6.12.8 _9116_GP0_Read_Count 91
7.2 Calibration 93
Table 18. Functions of VRs 94
7.3 Functional Testing 95
• Warranty Policy 98

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