Adlink ACL-8111 Manual do Utilizador descarregar pdf (Página 24)

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Registers Format

The chapter specifies the detailed descriptions of the register format. This

information is useful for the programmers who wish to handle the card by

low-level program.

3.1 Registers Address Map

The ACL-8111 requires 16 consecutive addresses in the I/O address space.

The following table (Table 3.1) shows the location of each register relative to

the base address and register descriptions.

Address Read Write

Base + 0 Counter 0 Counter 0

Base + 1 Counter 1 Counter 1

Base + 2 Counter 2 Counter 2

Base + 3 Not Used Counter Control

Base + 4 A/D low byte D/A low byte

Base + 5 A/D high byte D/A high byte

Base + 6 DI low byte Not Used

Base + 7 DI high byte Not Used

Base + 8 Not Used Clear Interrupt Request

Base + 9 Not Used Gain Control

Base + 10 Not Used Multiplexer Scan Control

Base + 11 Not Used Mode Control

Base + 12 Not Used Software A/D trigger

Base + 13 Not Used DO low byte

Base + 14 Not Used DO high byte

Base + 15 Not Used Not Used

Table 3.1 I/O Port Address Map

1 2 ... 19 20 21 22 23 24 25 26 27 28 29 ... 60 61

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