Adlink ACL-8112 Series Manual do Utilizador Página 14

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6 Introduction
Output Range:
Internal reference: (unipolar) 0~5V or 0~10V
External reference: (unipolar) max. +10V or -10V
Settling Time: 30
µ
sec
Linearity:
±
1/2 bit LSB
Output driving capability:
±
5mA max.
Digital I/O (DIO)
Number of channels: 16 TTL compatible inputs and outputs
Input Voltage:
Low: Min. 0V ; Max. 0.8V
High: Min. +2.0V
Input Load:
Low: +0.5V @ -0.2mA max.
High: +2.7V @+20mA max.
Output Voltage:
Low: Min. 0V ; Max. 0.4V
High: Min. +2.4V
Driving Capacity:
Low: Max. +0.5V at 8.0mA ( Sink)
High: Min. 2.7V at 0.4mA( Source)
Programmable Counter
Device: 8254
A/D pacer: 32-bit timer( two 16-bit counter cascaded together) with a
2MHz time base
Pacer Output: 0.00046 Hz ~ 100 KHz
Counter: One 16-bit counter with internal 2MHz time base or external
clock source
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