Adlink PCI-9810 Manual do Utilizador

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Advance Technologies; Automate the World.
Manual Rev. 3.02
Revision Date: December 2, 2008
Part No: 50-11116-2040
NuDAQ PCI-9812/9810
4-CH, 20 MHz Simultaneous
Analog Input Card
User’s Manual
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Resumo do Conteúdo

Página 1 - NuDAQ PCI-9812/9810

Advance Technologies; Automate the World.Manual Rev. 3.02Revision Date: December 2, 2008Part No: 50-11116-2040NuDAQ PCI-9812/98104-CH, 20 MHz Simult

Página 2

iv List of TablesList of TablesTable 2-1: JP1 Pin Definition ... 11Table 2-2: JP1 Pin Definition Co

Página 3 - Getting service

List of Figures vList of FiguresFigure 2-1: Location of Connectors... 10Figure 5-1: Post-trigger Acquisitio

Página 5 - Using this manual

Introduction 11 IntroductionThe PCI-9812/9810 is an advanced performance data acquisitioncard based on the 32-bit PCI bus architecture. With maximum

Página 6 - Conventions

2Introduction1.3 SpecificationsAnalog Input (AI)Converters B.B. ADS800 seriesInput Channels Four single-endedResolution 12-bit (PCI-9812)10-bit (PCI-9

Página 7 - Table of Contents

Introduction 3General SpecificationsConnectors 5 BNC-type, one 10-pin headerOperating Temperature 0°C to 40°CStorage Temperature -20°C to 80°CHumidit

Página 8

4Introduction1.4 Unpacking ChecklistBefore unpacking, check the shipping carton for any damage. Ifthe shipping carton and/or contents are damaged, inf

Página 9 - Table of Contents iii

Introduction 51.5 Software SupportSoftware SupportADLINK provides versatile software drivers and packages to suitvarious user approach to building a

Página 10 - List of Tables

6IntroductionPCIS-DASK/XInclude device drivers and shared library for Linux. Thedeveloping environment can be Gnu C/C++ or anyprogramming language tha

Página 11 - List of Figures

Introduction 7DASYLab™ PRODASYLab is an easy-to-use software package that provideseasy-setup instrument functions such as FFT analysis. ContactADLINK

Página 12

Copyright 2008 ADLINK TECHNOLOGY INC.All Rights Reserved.DisclaimerThe information in this document is subject to change without priornotice in order

Página 14 - 1.3 Specifications

Hardware Information 92 Hardware InformationThis chapter describes the PCI-9812/9810 layout, connectors,signal connection with external devices, and

Página 15

10 Hardware Information2.2 ConnectorsThe PCI-9812/9810 connects to external devices via five BNCconnectors and one 10-pin dual-in-line header. Figure

Página 16 - 1.4 Unpacking Checklist

Hardware Information 11JP1 Pin DefinitionBelow is the default JP1 pin assignment.When JP1 is connected to a 9-pin D-type connector using a ribboncabl

Página 17 - 1.5 Software Support

12 Hardware Information2.3 Input SettingsThis section describes the characteristics and settings of the PCI-9812/9810 inputs.Analog InputThe PCI-9812/

Página 18 - 6Introduction

Hardware Information 13CAUTION DO NOT leave the input connector unconnected when it is configured as high impedance input. The input connec-tor must

Página 19 - Introduction 7

14 Hardware InformationExternal Clock 0The external clock 0 (J5) is a sine wave signal that is converted toa TTL signal inside the PCI-9812/9810. Thi

Página 20 - 8Introduction

Installation 153 Installation3.1 Before You Proceed The PCI-9812/9810 card has electrostatic sensitive componentsthat can be easily damaged by static

Página 21 - 2 Hardware Information

16 Installation3.3 Configuring the CardAs a plug and play component, the card requests an interruptnumber through its PCI controller. The system BIOS

Página 22 - 2.2 Connectors

Registers 174RegistersDescriptions of the register format and structure of the PCI-9812/9810 are specified in this chapter. This information is for p

Página 23 - JP1 Pin Definition

Getting serviceCustomer satisfaction is our top priority. Contact us should yourequire any service or assistance.ADLINK TECHNOLOGY INC.Web Site http:/

Página 24 - 2.3 Input Settings

18 RegistersADC Channel Enable RegisterThe PCI-9812/9810 has four analog input channels: CH0, CH1,CH2, and CH3. CH0 to CH3 may be enabled or disabled

Página 25

Registers 19ADC Clock Divisor RegisterFeeding the ADC source clock to a clock frequency divider gener-ates the ADC sampling clock. The output of the

Página 26 - Digital Input

20 RegistersTrigger Mode RegisterThe PCI-9812/9810 has five trigger modes: software trigger, posttrigger, pre-trigger, middle trigger and delay trigge

Página 27 - 3 Installation

Registers 21Trigger Level RegisterThe trigger condition of the PCI-9812/9810 includes a trigger leveland a trigger slope. This register sets the trig

Página 28 - 3.3 Configuring the Card

22 RegistersTrigger Source RegisterThe PCI-9812/9810 supports five trigger sources: CH0, CH1,CH2, CH3, and external digital trigger.Address: BASE + 10

Página 29 - 4Registers

Registers 23Post Trigger Counter RegisterThe post trigger counter is a 16-bit down counter. The counter ispre-loaded with the value in the post trigg

Página 30 - ADC Channel Enable Register

24 RegistersFIFO Status RegisterMonitors some of the PCI-9812/9810 status.Address: BASE + 18hAttribute: ReadData Format:Bit 7 6 5 4 3 2 1 0BASE+18h —

Página 31 - ADC Clock Divisor Register

Registers 25FIFO Control RegisterControls the onboard FIFO memory.Address: BASE + 18hAttribute: WriteData Format:Bit 7 6 5 4 3 2 1 0BASE+18h — — — —

Página 32 - Trigger Mode Register

26 RegistersAcquisition Enable RegisterEnables or disables the ADC acquisition.Address: BASE + 1chAttribute: Write only Data Format:Bit 7 6 5 4 3 2 1

Página 33 - ±1 V) Trigger voltage(±5 V)

Registers 27Clock Source RegisterSelects the system clock source.Address: BASE + 20hAttribute: Write onlyData Format:NOTE When selected, the external

Página 34 - Trigger Source Register

ADLINK TECHNOLOGY INC. (KOREA Liaison Office)Sales & Service [email protected] No. +82-2-20570565Fax No. +82-2-20570563Mailing Address

Página 35 - Post Trigger Counter Register

28 Registers4.2 High Level ProgrammingThe PCI-9812/9810 card can be controlled directly using high-level Application Programming Interface (API) that

Página 36 - FIFO Status Register

Operation Theory 295 Operation TheoryThe operation theorem of the PCI-9812/9810 card functions isdescribed in this chapter. These functions include A

Página 37 - FIFO Control Register

30 Operation TheoryX A/D data transfer modeIn the end of an A/D conversion, the A/D data is buffered in aFIFO. The total FIFO size on PCI-9812/9810 is

Página 38 - Acquisition Enable Register

Operation Theory 315.2 Signal Source ControlTo control the A/D signal source, the signal type, signal channel,and signal range must be determined.Sig

Página 39 - Clock Source Register

32 Operation Theory5.3 Trigger Source ControlWhen performing trigger acquisition in the PCI-9812/9810, thefollowing parameters have to be specified be

Página 40 - 4.3 Low Level Programming

Operation Theory 33specified trigger level to a voltage that is higher than the speci-fied trigger level.Z Negative-slope triggerThe trigger event oc

Página 41 - 5 Operation Theory

34 Operation TheoryTrigger ModesX Software-trigger acquisitionThis trigger mode does not require any external trigger source.The trigger event occurs

Página 42 - 30 Operation Theory

Operation Theory 35X Middle-trigger acquisitionUse middle-trigger acquisition to collect data before and after aspecified trigger event. The amount o

Página 43 - 5.2 Signal Source Control

36 Operation Theory5.4 Clock Source ControlThe AD clock source determines how the board regulates thetiming of conversions when acquiring multiple sam

Página 44 - 5.3 Trigger Source Control

Operation Theory 37NOTE The clock divider must be an even number (2, 4, 6, 8, 10… 65534), with the minimum divider value being 2. Re-fer to section 6

Página 45 - Operation Theory 33

Using this manualAudience and scopeThis manual guides you when using ADLINK NuDAQ® multi-func-tion PCI card. The card’s hardware, signal connections,

Página 46 - Trigger Modes

38 Operation Theory5.5 Data TransferData TransferThere are several function blocks on the PCI-9812/9810 designedto acquire AD data. Even as the maximu

Página 47 - Operation Theory 35

Operation Theory 39Total Data ThroughputWhen four channels start simultaneously, the total data throughputfrom the AD converter to the onboard FIFO m

Página 48 - 5.4 Clock Source Control

40 Operation TheoryBus-mastering Data TransferPCI bus-mastering DMA is necessary for high speed DAQ in orderto utilize the maximum PCI bandwidth. The

Página 49 - Operation Theory 37

Operation Theory 41Storing data from the host memory to a hard disk or other storagedevices must also be considered. The burst data rate of currentHD

Página 50 - 5.5 Data Transfer

42 Operation Theory5.6 Data FormatThe A/D data of 12-bit PCI-9812 is on the 12 MSB of the 16-bit A/D data. The 4 LSB of the 16-bit A/D data must be tr

Página 51 - Maximum Acquiring Data Length

Operation Theory 43The formula showing the relationship of the A/D data and theanalog value is:Voltage = AD_data x (1/K) x (Gain)Where Gain and K are

Página 53 - Operation Theory 41

Function Reference 456 Function ReferenceThis chapter describes the software library for operating the PCI-9812/9810 card. Only the functions for DOS

Página 54 - 5.6 Data Format

46 Function Reference6.2 Programming GuideNaming ConventionThe functions of NuDAQ and NuIPC PCI/CompactPCI cards’ soft-ware driver use the following n

Página 55 - Operation Theory 43

Function Reference 47Data Types Some data types were defined in Pci_9812.h (DOS) and Acl_pci.h(Windows 95). These data types are used by the NuDAQ ca

Página 56 - 44 Operation Theory

ConventionsTake note of the following conventions used throughout the man-ual to make sure that you perform certain tasks and instructionsproperly.NOT

Página 57 - 6 Function Reference

48 Function Reference6.3 Function Reference_9812_InitialDescriptionInitializes the PCI-9812/9810 card. Each PCI-9812/9810 card hasto be initialized by

Página 58 - 6.2 Programming Guide

Function Reference 49Return Code(s)PCICardNumErrPCIBiosNotExistPCIBaseAddrErrNoError

Página 59 - Data Types

50 Function Reference_9812_Close DescriptionCloses a previously initialized 9812/9810 card.SyntaxC/C++ (DOS)int _9812_Close (int card_number)C/C++ (Wi

Página 60 - 6.3 Function Reference

Function Reference 51_9812_AD_DMA_Start DescriptionStarts an operation of A/D conversion N times with DMA datatransfer. It will take place in the bac

Página 61 - Return Code(s)

52 Function Referencebuff (DOS) Start address of the memory buffer that stores the A/D data. The buffer size must be larger than thenumber of A/D conv

Página 62 - _9812_Close

Function Reference 53Return Code(s)PCICardNumErrPCICardNotInitInvalidDMACntBufNotDWordAlignDMATransferNotAllowedNoError

Página 63 - _9812_AD_DMA_Start

54 Function Reference_9812_AD_DMA_StatusDescriptionSince _9812_AD_DMA_Start is executed in the background, thefunction _9812_AD_DMA_Status can be used

Página 64 - 1 Trigger is detected

Function Reference 55_9812_AD_DMA_StopDescriptionStops the DMA data transfer. After executing this function, the_9812_AD_DMA_Start function stops. Th

Página 65

56 Function Reference_9812_Set_Clk_SrcDescriptionSpecifies the ADC clock source.SyntaxC/C++ (DOS)int _9812_Set_Clk_Src (int card_number, int clk_src,

Página 66 - _9812_AD_DMA_Status

Function Reference 57_9812_Set_Clk_RateDescriptionSpecifies the clock divider for the ADC clock. The value of theclock divider must be even and betwe

Página 67 - _9812_AD_DMA_Stop

Table of Contents iTable of ContentsList of Tables... ivList of Figures ...

Página 68 - _9812_Set_Clk_Src

58 Function Reference_9812_Set_TrigDescriptionSets up the trigger. The function specifies the trigger mode, triggerlevel (voltage), trigger source, tr

Página 69 - _9812_Set_Clk_Rate

Function Reference 59trig_pol Trigger slope.trig_lvl Trigger level. Refer to section 4.1.post_trig_cnt Post trigger count. This value is pre-loaded t

Página 70 - _9812_Set_Trig

60 Function ReferenceW_9812_Alloc_DMA_MemDescriptionTells the Windows 95 system to allocate a block of contiguousmemory for DMA transfer. This functio

Página 71 - InvalidClkDiv

Function Reference 61W_9812_Free_DMA_MemDescriptionReleases a system DMA memory in Windows 95. This function isonly available for Windows 95.SyntaxC/

Página 72 - W_9812_Alloc_DMA_Mem

62 Function ReferenceW_9812_Get_SampleDescriptionFor languages without pointer support such as Visual Basic, pro-grammers can use this function to acc

Página 73 - W_9812_Free_DMA_Mem

Calibration 637 CalibrationIn data acquisition, you must calibrate your measurement devicesto maintain accuracy. You can calibrate the analog input a

Página 74 - W_9812_Get_Sample

64 Calibration7.3 A/D CalibrationA/D Calibration for Channel 01. Apply a +1 V input signal to A/D channel 0 and trim VR5until the average reading of c

Página 75 - 7 Calibration

Software Utility 658 Software UtilityThe 9812util.exe included in the ADLINK all-in-One CD comeswith three functions: system configuration, calibrati

Página 76 - 7.3 A/D Calibration

66 Software Utility8.2 System ConfigurationUse the functions in System Configuration <F1> to configure thePCI-9812/9810 card. The following scre

Página 77 - 8 Software Utility

Software Utility 678.3 CalibrationThis function takes you through the card calibration process. Thecalibration program is a useful test for A/D, D/A,

Página 78 - 8.2 System Configuration

ii Table of ContentsPost Trigger Counter Register ...23FIFO Status Register ...

Página 79 - 8.3 Calibration

68 Software UtilityFor example, if you select <3>, the following window appears:

Página 80 - 68 Software Utility

Software Utility 698.4 Functional TestingThis tool tests the A/D functions of the card. When you selectFunction testing. <3> from the main menu

Página 81 - 8.4 Functional Testing

70 Software UtilityThe following diagram is a snapshot of the post-trigger testing.

Página 82 - 70 Software Utility

Table of Contents iiiW_9812_Free_DMA_Mem ............ 61W_9812_Get_Sample ............

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