Adlink PCI-9810 Manual do Utilizador descarregar pdf (Página 31)

Registers 19

ADC Clock Divisor Register

Feeding the ADC source clock to a clock frequency divider gener-

ates the ADC sampling clock. The output of the frequency divider

becomes the sampling clock. The frequency of the ADC sampling

clock is:

Frequency of source clock / ADC clock divisor

Address: BASE+04h

Attribute: Write only

Data Format:

NOTE The minimum value of this register is 2, and the DIV0 is

hardwired to 0.

Bit 7 6 5 4 3 2 1 0

Base+4 DIV7 DIV6 DIV5 DIV4 DIV3 DIV2 DIV1 DIV0

Base+5 DIV15 DIV14 DIV13 DIV12 DIV11 DIV10 DIV9 DIV8

Base+6————————

Base+7————————

DIV15...0 AD clock frequency devisor.

— Any value

1 2 ... 26 27 28 29 30 31 32 33 34 35 36 ... 81 82

NuDAQ PCI-9812/9810 1
Getting service 3
Using this manual 5
Conventions 6
Table of Contents 7
Table of Contents iii 9
List of Tables 10
List of Figures 11
1 Introduction 13
1.3 Specifications 14
1.4 Unpacking Checklist 16
1.5 Software Support 17
6Introduction 18
Introduction 7 19
8Introduction 20
2 Hardware Information 21
2.2 Connectors 22
JP1 Pin Definition 23
2.3 Input Settings 24
External Clock 0 26
External Clock 1 26
Digital Input 26
3 Installation 27
3.3 Configuring the Card 28
4Registers 29
ADC Channel Enable Register 30
ADC Clock Divisor Register 31
Trigger Mode Register 32
Trigger Level Register 33
±1 V) Trigger voltage(±5 V) 33
Trigger Source Register 34
Post Trigger Counter Register 35
FIFO Status Register 36
FIFO Control Register 37
Acquisition Enable Register 38
Clock Source Register 39
4.2 High Level Programming 40
4.3 Low Level Programming 40
5 Operation Theory 41
30 Operation Theory 42
5.2 Signal Source Control 43
5.3 Trigger Source Control 44
Operation Theory 33 45
Trigger Modes 46
Operation Theory 35 47
5.4 Clock Source Control 48
Operation Theory 37 49
5.5 Data Transfer 50
Total Data Throughput 51
Maximum Acquiring Data Length 51
Bus-mastering Data Transfer 52
Host Memory Operation 52
Operation Theory 41 53
5.6 Data Format 54
Operation Theory 43 55
44 Operation Theory 56
6 Function Reference 57
6.2 Programming Guide 58
Data Types 59
6.3 Function Reference 60
Return Code(s) 61
_9812_Close 62
_9812_AD_DMA_Start 63
0 No trigger is detected 64
1 Trigger is detected 64
_9812_AD_DMA_Status 66
_9812_AD_DMA_Stop 67
_9812_Set_Clk_Src 68
_9812_Set_Clk_Rate 69
_9812_Set_Trig 70
Function Reference 59 71
PCICardNumErr 71
PCICardNotInit 71
InvalidClkDiv 71
W_9812_Alloc_DMA_Mem 72
W_9812_Free_DMA_Mem 73
W_9812_Get_Sample 74
7 Calibration 75
7.3 A/D Calibration 76
8 Software Utility 77
8.2 System Configuration 78
8.3 Calibration 79
68 Software Utility 80
8.4 Functional Testing 81
70 Software Utility 82

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