Adlink VPX6000 Manual do Utilizador

Consulte online ou descarregue Manual do Utilizador para Hardware Adlink VPX6000. ADLINK VPX6000 User Manual Manual do Utilizador

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Advance Technologies; Automate the World.
Manual Rev.: 0.10 preliminary
Revision Date: May 20, 2014
Part No: 50-15097-1000
VPX6000 Series
Performance Rugged Conduction Cooled
6U VPX 4th Gen Intel® Core™ i7
Processor Blade
Vista de página 0
1 2 3 4 5 6 ... 61 62

Resumo do Conteúdo

Página 1 - VPX6000 Series

Advance Technologies; Automate the World.Manual Rev.: 0.10 preliminaryRevision Date: May 20, 2014Part No: 50-15097-1000VPX6000 SeriesPerformance Ru

Página 2 - Revision History

xList of FiguresThis page intentionally left blank.

Página 3 - Preface iii

List of Tables xiVPX6000List of TablesTable 2-1: VPX6000 Blade Specifications ... 9Table 2-2: VPX-R6000 RTM Spec

Página 4

xii List of TablesThis page intentionally left blank.

Página 5 - Conventions

Introduction 1VPX60001 Introduction1.1 OverviewThe VPX6000 is a dual-CPU 4th Generation Intel® Core™ i7 pro-cessor 6U VPX blade (0.85" pitch) wi

Página 6

2Introduction1.2 FeaturesX 6U VPX VITA 46, OpenVPX VITA 65, VPX REDI (VITA 48)X Rugged conduction cooled 0.85" pitch 6U VPX blade with con-formal

Página 7 - Table of Contents

Introduction 3VPX60001.3 Functional Block DiagramsFigure 1-1: VPX6000 Functional Block DiagramPCIe x1PCIe x1PCIe x1PCIe x1iAMTP5 Front P4PCIe x8P1 P1

Página 8

4IntroductionFigure 1-2: VPX-R6000 RTM Functional Block Diagram SATA 1 portCN34board-to- boardconnectorUSB 3.0 + USB 2.0 GPIO LED X 8 GPIO signalVS

Página 9 - List of Figures

Introduction 5VPX6000Figure 1-3: tBP-VPX6000 Test Backplane Functional Block DiagramVBAT2X 10/100/1000BASE-TRJ-45 jack X2SATA3.06 portUSB2.04 portUSB

Página 10

6Introduction1.4 Model Number Decoder - Processor Blade(A) CPU CodeZ S4700 = Single 4-core Intel® Core™ i7-4700EQ processorZ D4700 = Dual 2-core Intel

Página 11 - List of Tables

Introduction 7VPX60001.5 Package Contents The VPX6000 is packaged with the following components. If anyof the items on the contents list are missing

Página 12

ii Revision HistoryRevision HistoryRevision Release Date Description of Change(s)0.10 20/05/2014 Preliminary release

Página 13 - 1 Introduction

8IntroductionThis page intentionally left blank.

Página 14 - 1.2 Features

Specifications 9VPX60002 Specifications2.1 VPX6000 Blade SpecificationsForm Factor • 6U VPX VITA 46• OpenVPX VITA 65• VPX REDI (VITA 48)Dual System •

Página 15 - 1.3 Functional Block Diagrams

10 SpecificationsNote: Specifications are subject to change without prior notice.Audio • Stereo audio, single-ended Line-in, Line-out to RTM (each no

Página 16 - 4Introduction

Specifications 11VPX60002.2 VPX-R6000 RTM SpecificationsNote: Specifications are subject to change without prior notice.VITA Standards • VITA 46.10 R

Página 17 - Introduction 5

12 Specifications2.3 Power ConsumptionThis section provides information on the power consumption of theVPX6000.Table 2-3: VPX6000 Power ConsumptionNot

Página 18 - PX6000/D4700/M64/S32-R1

Functional Description 13VPX60003 Functional DescriptionThe following sections describe the VPX6000 features andfunctions.3.1 ProcessorsThe 4th Gener

Página 19 - 1.5 Package Contents

14 Functional DescriptionSupported TechnologiesZ Intel® Virtualization Technology for Directed I/O (Intel® VT-d)X Intel® Virtualization Technology (In

Página 20 - 8Introduction

Functional Description 15VPX60003.2 ChipsetThe VPX6000 incorporates the Mobile Intel® QM87 Chipset(Intel® DH82QM87 PCH).Mobile Intel® QM87 Express Ch

Página 21 - 2 Specifications

16 Functional Description3.3 Intel® Turbo Boost TechnologyIntel Turbo Boost Technology is a feature that allows the processorto opportunistically and

Página 22

Board Interfaces 17VPX60004 Board Interfaces4.1 VPX6000 Board LayoutFigure 4-1: VPX6000 Board Layout - Top ViewFigure 4-2: VPX6000 Front IONode ACPUN

Página 23

Preface iiiVPX6000PrefaceCopyright 2014 ADLINK Technology Inc.This document contains proprietary information protected by copy-right. All rights are

Página 24 - 2.3 Power Consumption

18 Board InterfacesFigure 4-3: VPX6000 Board Layout - Back ViewWedge LockAluminumThermal ModuleAlignment Key 1Wedge LockStatus LEDsAlignment Key 3P0P1

Página 25 - 3 Functional Description

Board Interfaces 19VPX60004.2 VPX6000 Onboard Connector Pin AssignmentsUSB 3.0 Connector (Node A: CN3; Node B: CN12)DB-15 VGA Connector (Node A: CN1;

Página 26 - Interfaces

20 Board InterfacesRJ-45 Gigabit Ethernet Connectors (CN9 and CN10)LAN LED Status DefinitionsPin # 1000BASE-T1BI_DA+2BI_DA-3BI_DB+4BI_DC+5BI_DC-6BI_DB

Página 27 - 3.2 Chipset

Board Interfaces 21VPX6000Information LEDsLED Ref Color DescriptionLED15 Blue Node A Vcore Power GoodLED13 Blue Node A PCH P1V5 Power GoodLED28 Yello

Página 28 - 3.5 Real Time Clock

22 Board Interfaces4.3 VPX6000 VPX Connector Pin AssignmentsP0 Connector Pin AssignmentPin A B C D E F G1 P12V P12V P12V NC P12V P12V P12V2 P12V P12V

Página 29 - 4 Board Interfaces

Board Interfaces 23VPX6000P1 Connector Pin AssignmentPin A B C D E F G1NA_10G_RX0_L0_PNA_10G_RX0_L0_NGNDNA_10G_TX0_L0_PNA_10G_TX0_L0_NGNDNA_10G_RX0_L

Página 30 - 18 Board Interfaces

24 Board InterfacesTable 4-1: P1 Connector Signal DescriptionsSignal I/O DescriptionBAT_CN I RTC battery power sourceSYS_CON-L IRule 4-33: The SYS_CON

Página 31

Board Interfaces 25VPX6000P2 Connector Pin AssignmentPin A B C D E F G1PCIE_BP1_RXP0PCIE_BP1_RXN0GNDPCIE_BP1_TXP0PCIE_BP1_TXN0GND NC2GNDPCIE_BP1_RXP1

Página 32 - LAN LED Status Definitions

26 Board InterfacesTable 4-2: P2 Connector Signal DescriptionsSignal I/O DescriptionIPMI_PRG_RX /IPMI_PRG_TXI/O COM port for IMPC software develop32NT

Página 33 - Information LEDs

Board Interfaces 27VPX6000P3 Connector Pin AssignmentPin A B C D E F G1NA_REAR-RXP1NA_REAR-RXN1GNDNA_REAR-TXP1NA_REAR-TXN1GNDNA_REAR-RXP12GNDNA_REAR-

Página 34 - P0 Connector Pin Assignment

iv PrefaceUsing this ManualAudience and ScopeThe VPX6000 User’s Manual is intended for hardware techniciansand systems operators with knowledge of ins

Página 35 - P1 Connector Pin Assignment

28 Board InterfacesTable 4-3: P3 Connector Signal DescriptionsSignal I/O DescriptionNA_REAR-RX[P/N]1 I Node A PCIe port1 receive LAN from backplane to

Página 36 - 24 Board Interfaces

Board Interfaces 29VPX6000P4 Connector Pin AssignmentPin A B C D E F G1NB_REAR-RXP1NB_REAR-RXN1GNDNB_REAR-TXP1NB_REAR-TXN1GNDNB_REAR-RXP12GNDNB_REAR-

Página 37 - P2 Connector Pin Assignment

30 Board InterfacesTable 4-4: P4 Connector Signal DescriptionsSignal I/O DescriptionNB_REAR-RX[P/N]1 I Node B PCIe port1 receive lan from backplane to

Página 38 - 26 Board Interfaces

Board Interfaces 31VPX6000P5 Connector Pin AssignmentPin A B C D E F G1NA_USB2-P2NA_USB2-N2GNDNA_USB2-P4NA_USB2-N4GNDNA_USB2-P22GNDNA_USB2-P6NA_USB2-

Página 39 - P3 Connector Pin Assignment

32 Board InterfacesTable 4-5: P5 Connector Signal DescriptionsSignal I/O DescriptionNA_USB2-[P/N]2NA_USB2-[P/N]4NA_USB2-[P/N]6NA_USB2-[P/N]8I/O Node A

Página 40 - 28 Board Interfaces

Board Interfaces 33VPX6000P6 Connector Pin AssignmentPin A B C D E F G1NB_USB2-P2NB_USB2-N2GNDNB_USB2-P4NB_USB2-N4GNDNB_USB2-P22GNDNB_USB2-P6NB_USB2-

Página 41 - P4 Connector Pin Assignment

34 Board InterfacesTable 4-6: P6 Connector Signal DescriptionsSignal I/O DescriptionNB_USB2-[P/N]2NB_USB2-[P/N]4NB_USB2-[P/N]6NB_USB2-[P/N]8I/O Node B

Página 42 - 30 Board Interfaces

Board Interfaces 35VPX60004.4 tBP-VPX6000 Board LayoutFigure 4-4: tBP-VPX6000 Board Layout - Front ViewXMCConnectorsSlot 1Slot 2Slot 3Slot 4Slot 5VPX

Página 43 - P5 Connector Pin Assignment

36 Board InterfacesFigure 4-5: tBP-VPX6000 Board Layout - Rear ViewVPX RJ ConnectorsInfiniBandConnectorsBIOSSocketsAudioConnectorsGPIOLEDsATX PowerCon

Página 44 - 32 Board Interfaces

Board Interfaces 37VPX6000Table 4-7: tBP-VPX6000 Signal Routing TableSignal Connection to/fromUSB 3.0 Slot5USB 2.0 Slot5HDMI Slot5DVI Slot5Gigabit Et

Página 45 - P6 Connector Pin Assignment

Preface vVPX6000ConventionsTake note of the following conventions used throughout thismanual to make sure that users perform certain tasks andinstruc

Página 46 - 34 Board Interfaces

38 Board Interfaces4.5 tBP-VPX6000 Connector Pin AssignmentsUSB 3.0 ConnectorNode A: CN61, CN63; Node B: CN65,CN67USB ConnectorsNode A: CN62,CN64; Nod

Página 47 - 4.4 tBP-VPX6000 Board Layout

Board Interfaces 39VPX6000DVI-D ConnectorNode A: CN74; Node B: CN76Pin # Signal Pin # Signal1 TMDS Data2- 16 Hot Plug Detect2 TMDS Data2+ 17 TMDS Dat

Página 48 - 36 Board Interfaces

40 Board InterfacesHDMI ConnectorNode A: CN73; Node B CN75RJ-45 Gigabit Ethernet ConnectorsCN77 (Slot 1 w/ iAMT), CN78 (Slot 2 w/ iAMT), CN79 (Slot 5,

Página 49

Board Interfaces 41VPX6000XMC ConnectorsNode A: CN84; Node B: CN83Pin A B C D E F1RXP0 RXN0 +3.3V RXP1 RXN1 VPWR2GND GND TRST# GND GND MRSTI#3RXP2 RX

Página 50

42 Board InterfacesInfinband ConnectorNode A: CN90, CN91; Node B: CN92,CN93IDT Switch Hub I2C Connector (JP4)COM ConnectorNode A: JP6; Node B: JP8Pin

Página 51 - Node A: CN74; Node B: CN76

Board Interfaces 43VPX6000IPMC JTAG Connector (JP9)VPX JTAG Connector (JP11)Speaker Out Connector (JP7)COM ConnectorNode A: CN87; Node B: CN88Pin Sig

Página 52

44 Board InterfacesVPX SM ConnectorSM01: CN94; SM23: CN95IPMC UART Connector (JP10)Keyboard/Mouse ConnectorNode A: CN85; Node B: CN86Pin Signal1DATA2G

Página 53 - Node A: CN84; Node B: CN83

Board Interfaces 45VPX60004.6 tBP-VPX6000 Switches and JumpersBIOS Select Jumper (JP5)Reset ButtonsX SW1: System Reset ButtonX SW2: Maskable Reset Bu

Página 54 - Node A: JP6; Node B: JP8

46 Board InterfacesThis page intentionally left blank.

Página 55

Important Safety Instructions 47VPX6000Important Safety InstructionsFor user safety, please read and follow all instructions,WARNINGS, CAUTIONS, and

Página 56 - Node A: CN85; Node B: CN86

vi PrefaceThis page intentionally left blank.

Página 57

48 Important Safety InstructionsX Never attempt to fix the equipment. Equipment should only be serviced by qualified personnel.A Lithium-type battery

Página 58 - 46 Board Interfaces

Getting Service 49VPX6000Getting ServiceContact us should you require any service or assistance. ADLINK Technology, Inc. Address: 9F, No.166 Jian

Página 59 - Important Safety Instructions

50 Getting ServiceADLINK Technology, Inc. (French Liaison Office) Address: 6 allée de Londres, Immeuble Ceylan 91940 Les Ulis, France Tel: +33

Página 60 - WARNING:

Table of Contents viiVPX6000Table of ContentsRevision History... iiPreface...

Página 61 - Getting Service

viii Table of Contents4.5 tBP-VPX6000 Connector Pin Assignments ... 384.6 tBP-VPX6000 Switches and Jumpers...

Página 62 - 50 Getting Service

List of Figures ixVPX6000List of FiguresFigure 1-1: VPX6000 Functional Block Diagram......... 3Figure 1-2: VPX-R6000 RTM Funct

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