Adlink VPX6000 Manual do Utilizador descarregar pdf (Página 38)

26 Board Interfaces

Table 4-2: P2 Connector Signal Descriptions

Signal I/O Description

IPMI_PRG_RX /

IPMI_PRG_TX

I/O COM port for IMPC software develop

32NT8A_MSMBCLK /

32NT8A_MSMBDAT

I/O I2C port for PCIE Switch Hub software develop

PCIE_BP1_

[N/P]TX(3:0)

O PCIe channel A transmit lane from payload to backplane

PCIE_BP1_

[N/P]RX(3:0)

I PCIe channel A receive lane from backplane to payload

PCIE_BP2_

[N/P]TX(3:0)

O PCIe channel B transmit lane from payload to backplane

PCIE_BP2_

[N/P]RX(3:0)

I PCIe channel B receive lane from backplane to payload

PCIE_BP3_[

N/P]TX(3:0)

O PCIe channel C transmit lane from payload to backplane

PCIE_BP3_

[N/P]RX(3:0)

I PCIe channel C receive lane from backplane to payload

PCIE_BP4_

[N/P]TX(3:0)

O PCIe channel D transmit lane from payload to backplane

PCIE_BP4_

[N/P]RX(3:0)

I PCIe channel D receive lane from backplane to payload

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